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Compact AES-256 CBC mode encryption/decryption

This design is a complete AES-256 encryption/decryption system that works in Cipher Block Chaining (CBC) mode, it includes 3 main blocks:
  • Dec 22, 2015
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Locking a bitstream to a single 7-Series device

Each Xilinx FPGA has a unique 64bit identification number preprogrammed into it - this is known as the DNA. This ID can be very useful for many different purposes..
  • Nov 15, 2015
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USR_ACCESS primitive with AXI interface

There are a couple of posts in the notes section of this site about using the USR_ACCESS primitive for identifying bitstreams..
  • Nov 8, 2015
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Simple filter and debounce circuit

This is a simple filter for single-bit serial inputs, digital I/O or can also be used as part of a debounce circuit for pushbuttons and dipswitches...
  • Nov 7, 2015
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