Matching a programmed FPGA to its bitstream file
The previous post about bitstream timestamps shows a way to automatically insert a timestamp into a bitstream such that it can be read back via JTAG or
internally (more on this later). This post will show how to use a tcl script to generate a timestamp, attach it to the USR_ACCESS primiitve and then generate
a bitstream that includes the timestamp in its file name. This way, assuming you don't mess around with the clock on your computer, each bitstream will a unique
8 character identifier that can be read back from the FPGA and matched back to the .bit file.
The tcl script works like this - the computer system clock is read using the clock command:
- set DateTime [clock format [clock seconds] -format "%Y-%m-%d %H:%M:%S"]
The various component parts of the system time (year, month, day, etc) are extracted from the DateTime variable and then reformatted to hex characters with lengths (in bits) like this:
- ddddd 5 bits for 31 days in a month
- MMMM 4 bits for 12 months in a year
- yyyyyy 6 bits for the last two digits of the year, 2000 to 2063
- hhhhh 5 bits for the hour in 24-hour format
- mmmmmm 6 bits for the minutes
- mmmmmm 6 bits for the seconds
The reformated hex characters are then used with the appropriate set_property constraint on the implemented design.
A bitstream is generated with a file name that has a suffix that is the 8 character hex code that represents the timestamp. Now
the USR_ACCESS can be read back via JTAG and the bit file used to configure it can be immediately identified.
An example tcl script and design can be dowloaded here.